To increase the functionality and density of semiconductor devices multiple semiconductor chips are stacked on a substrate or on each other. For instance, chips with the same functions, e.g., memory chips are stacked to increase the memory density or chips with different functions, e.g., processor chip and memory chip are stacked to minimize the processing time. Usually a first chip is mounted on a substrate. A second chip is then mounted onto the upper side of the first chip.
In the so called Through Silicon Interconnect Technology (TSV—Through Silicon Via), electric connections between chips, or between substrate and chip are led directly through the chip. At this, via holes are formed directly into the semiconductor substrate. The inner surface of the via holes is passivated and the via hole are filled with conductive material.
For stacking at chip level or at wafer level, the chips or the wafers each having a plurality of semiconductor chips are stacked on each other. Chips and wafers are prepared using any conventional semiconductor manufacturing process. Each semiconductor chip is provided with a plurality of interconnect elements mostly comprising a through electrode and a bump wherein a bump is formed on at least one end surface of the through electrodes.
A plurality of such chips or wafers are then sequentially stacked so that the corresponding through electrodes or bumps of adjacent chips are aligned and brought into contact so as to provide electric connection between vertical adjacent chips. In stacking at wafer level, the stacked wafers are then divided into individual chip stack packages.